Design and implementation of mixed signal chip using ic design flow

Abstract

The continuous evolution of semiconductor technology has increased the demand for embedded systems that offer higher performance, lower power consumption, and reduced development cost. In this context, this thesis presents the design and implementation of a RISC-V based microcontroller using reusable IP cores and open-source Electronic Design Automation (EDA) tools. The work begins with an overview of integrated circuit design fundamentals, semiconductor technologies, and digital system design methodologies. It then introduces microcontroller architectures and justifies the selection of a RISC architecture based on the PicoRV32 processor core. The proposed microcontroller integrates ROM, RAM, GPIO, UART, and I²C peripherals through a memory-mapped bus architecture, providing a flexible and scalable embedded platform. The implementation phase focuses on IP integration, hardware description in Verilog, system verification, synthesis, and physical design using open-source tools. The final design was successfully implemented in 130 nm technology and verified through simulation and physical validation. The obtained results demonstrate that the proposed microcontroller achieves low power consumption, compact silicon area, and reliable timing performance while maintaining a low- cost development flow. The project confirms the effectiveness of combining reusable IP cores with open-source EDA tools for the development of modern embedded systems and future ASIC designs.